Carrier suppression type modulator with encoded modulating signals

ABSTRACT

A carrier suppressed information signal modulation arrangement employs a plurality of serially coupled modulators. Each of the serially coupled modulators has a carrier input, a modulating signal input and a modulated carrier output. A carrier is applied to the carrier input of the first modulator and the suppressed modulated carrier output of each modulator is coupled to the carrier input of a succeeding modulator. An encoder responsive to the information signal generates modulating signals to be applied to the modulating signal inputs of the serially coupled modulators, such that a product of the modulating signals forms the information signal. The modulating signals applied to each of the serially coupled modulators modifies the modulated carrier output received at the carrier input of the respective modulator to produce a carrier suppressed information signal modulated output of the last of the serially coupled modulators.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to modulation systems and more particularly tomodulation arrangements in which the carrier is suppressed.

2. Background of the Invention

In many types of modulated transmission systems, a carrier modulated byan information signal is applied to a medium for transmission. Theinformation signal may be analog or digital and of electrical or opticalform. The power in the modulated signal is distributed among the carrierand modulation components. In satellite and other communication systemswhere the spectrum utilized for communication is crowded, thetransmission power of individual channels is restricted to avoidinter-channel interference. To reduce the channel power withoutimpairing information transmission, it is well known, to suppress thecarrier component of the transmission signal. Such carrier suppressionis important in making wideband frequency allocations to existingnarrowband services, in spread spectrum systems where it is difficult tomeet regulated spectral density requirements and in a Weaver Demodulatorin which a signal is processed to produce an output in the form of anupper sideband.

Carrier suppression has been performed through the use of filters, byprecise adjustment of modulator parameters and by balanced typemodulators such as described in U.S. Pat. No. 5,450,044 issued toTimothy P. Hulick on Sep. 12, 1995, or in U.S. Pat. No. 4,748,641 issuedto Mark J. Dapper on May 31, 1988. In the Dapper patent, a binary phaseshift keying type BPSK modulator is disclosed in which the I (in-phase)modulating component of a BPSK signal is mixed with an RF carrier sourcein one mixer, the Q (quadrature-phase) modulating component of the BPSKsignal is mixed with the RF carrier phase shifted by 90 degrees inanother mixer and the outputs of the mixers are summed in a summingnetwork. The summing network output then provides a suppressed carriersignal according to the matching of the operating characteristics of themixers and the balance of modulating signal amplitudes and phases. Thedegree of carrier suppression in filtered and balanced modulatorsystems, however, relies on the precise adjustment of the operatingcharacteristics in the transmitter to obtain cancellation of the carrierin the summing network. Such precise adjustment, however, is difficultto achieve and maintain under changing ambient conditions such astemperature, aging, and radiation effects.

In another carrier suppression arrangement for a QAM transmitterdisclosed in U.S. Pat. No. 6,687,311 issued to Qin Zhang on Feb. 3,2004, a monitoring device monitors phase and amplitude errors in anoutput RF signal with QAM components and provides a feedback signal toan equalizer. The equalizer produces an analog equalizing signal thatequalizes the phases and amplitudes of the I and Q components of the QAMsignal. Such feedback arrangements are effective to provide carriersuppression without precise modulator adjustments but add significantcomplexity and cost. The feedback arrangements also require settlingtime from turn-on until a satisfactory level of carrier suppressionlevel is achieved and are ineffective for burst-communication systems.

FIG. 1 illustrates the operation of a feedback arrangement to stabilizecarrier suppression. In FIG. 1, there is a modulator 105, a carrierlevel detector 110, a carrier null control 115, and a carrier nulladjuster 120. A portion of the output of the modulator 105 is suppliedto the carrier level detector 110 and the carrier null control 115provides a carrier null signal responsive to the detected carrier level.The carrier null signal from the carrier null control 115 is combinedwith a manual adjustment signal in the carrier null adjuster 120. Theoutput of the carrier null adjuster is combined with the input signalthrough combiner 101 and the combined output is applied as themodulating signal input to the modulator 105. The modulator 105 receivesthe carrier and an adjusted modulating signal derived from an inputsignal and the carrier null adjuster 120. The implementation of afeedback arrangement for carrier suppression, however, is subject tomanual adjustment and requires added equipment and a significant settingtime from turn-on. In satellite and other communication systems wherespace, weight, and maintenance access are important, the added feedbacktype carrier suppression equipment is undesirable. Accordingly, it is aproblem to provide adequate carrier suppression without requiring eitherprecise adjustment of transmitter parameters or the addition of feedbacktype carrier suppression equipment.

U.S. Pat. No. 4,447,907 issued to John E. Bjornholt et al., May 8, 1984,discloses a multiple mixer spread spectrum modulation arrangement inwhich there are plural serially coupled bi-phase modulators and a set ofcode generators which generate plural binary code signals. The pluralbinary code signals are phased to have equal relative phase angles andserially modulate an input carrier signal. Each modulator spreads thecarrier signal applied thereto. The signal power of the modulatedcarrier after the serially coupled bi-phase modulators is spread over arange of frequencies determined by the binary coded modulating signals.As a result, the Bjornholt et al. arrangement provides a spread carriersignal that resembles noise for use in a spread spectrum communicationrather than a carrier suppressed information signal. Accordingly, theBjornholt et al. arrangement is suitable only for wideband transmissionsystems that require or utilize pseudo-random noise spectral spreadingsignals.

SUMMARY OF THE INVENTION

The invention is directed to apparatus in which a carrier is modulatedin a set of serially coupled modulators and in which a modulating signalis applied to each of the serially coupled modulators.

According to one aspect of the invention, modulating signals applied tothe serially coupled modulators modify the modulated carrier outputreceived at their carrier inputs to produce a carrier-suppressedinformation signal modulated output of the last of the plurality ofserially coupled modulators, the product of the modulating signalsforming the information signal.

According to another aspect of the invention, the modulating signalsapplied to particular ones of the serially coupled modulators produce amodulation component in the modulated carrier output that substantiallyremoves the modulating component produced by a preceding modulator andthe modulating signal applied to the carrier input of one of theserially coupled modulators includes the information signal.

According to yet another aspect of the invention, there are first andsecond serially coupled modulators. The modulating signal applied to thesecond modulator has a component that is the reciprocal of themodulating signal applied to the first modulator and also includes theinformation signal.

According to yet another aspect of the invention, the modulating signalapplied to the first modulator of the first and second modulators is apseudo-random signal.

According to yet another aspect of the invention, the information signalapplied to one of the first and second modulators is an analog signal ora quadrature amplitude modulated (QAM) signal.

According to yet another aspect of the invention, the information signalis a binary phase shift keying signal. The modulating signals applied toserially connected first and second modulators for succeeding binaryones in the binary shift keying signal alternates between 1, 1 and −1,−1 and the modulating signal applied to the first and second modulatorsfor succeeding binary zeros in the binary shift keying signal alternatesbetween 1, −1 and −1,1.

According to yet another aspect of the invention, the plurality ofserially coupled modulators consists of first and second modulators andthe information signal is a quadrature phase shift keying (QPSK) signal.The modulating signals applied to the first and second modulators forsucceeding I=−1,Q=−1's in the information signal rotates among I,Qs of(1,1) (−1,−1), (−1,−1) (1,1), (1,−1) (−1,1), (−1,1) (1,−1); themodulating signals applied to the first and second modulators forsucceeding I=−1,Q=1's in the information signal rotate among I,Qs of(−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1), (1,−1) (−1,−1); themodulating signals applied to the first and second modulators forsucceeding I=1,Q=−1's in the information signal rotate among I,Qs of(1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1,−1) (−1,1); and themodulating signals applied to the first and second modulators forsucceeding I=1,Q=1's in the information signal rotate among I,Qs of(1,1) (1,1), (−1, −1) (−1,−1), (−1,1) (−1,1), (1,−1) (1,−1).

According to yet another aspect of the invention, the plurality ofserially coupled modulators consists of first and second modulators andthe information signal is a quadrature phase shift keying signal. Themodulating signals applied to the first and second modulators forsucceeding I=−1,Q=−1's in the information signal is randomly selectedamong I,Qs of (1,1) (−1,−1), (−1,−1) (1,1), (1,−1) (−1,1), (−1,1)(1,−1); the modulating signals applied to the first and secondmodulators for succeeding I=−1,Q=1's in the information signal israndomly selected among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1), (1,1)(−1,1), (1,−1) (−1,−1); the modulating signals applied to the first andsecond modulators for succeeding I=1,Q=−1's in the information signal israndomly selected among I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1)(−1,−1), (−1,−1) (−1,1); and modulating signals applied to the first andsecond modulators for succeeding I=1,Q=1's in the information signal israndomly selected among I,Qs of (1,1) (1,1), (−1,−1) (−1,−1), (−1,1)(−1,1), (1,−1) (1,−1).

In one embodiment according to the invention, first and secondmodulators are serially coupled and a carrier is applied to the firstmodulator. An encoder forms a non-zero pseudo-random pattern signal asthe modulating signal that is applied to the first modulator and theproduct of an information signal and a reciprocal of the non-zeropseudo-random signal as the modulating signal that is applied to thesecond modulator. The output of the first modulator has a partiallysuppressed carrier and a non-zero pseudo-random modulation component. Inthe second modulator, the carrier is further suppressed and thereciprocal non-zero pseudo-random signal modulation component removesthe non-zero pseudo-random modulation component from the firstmodulator. The second modulator outputs the further suppressed carrierand a modulation component corresponding to the information signal.

In another embodiment of the invention, a binary phase shift keyingmodulator is formed of serially coupled first and second modulators. Abinary information signal is applied to an encoder that provides adifferent modulating signal to each of the first and second modulators.In response to succeeding “ones” in the information signal, the encoderalternately forms a −1 and 1 modulating signal for the first modulatorand a 1 and −1 modulating signal for the second modulator to produce a−1 output from the second modulator. In response to succeeding “zeros”in the information signal, the encoder alternately forms a −1 and 1modulating signal for the first modulator and a −1 and 1 modulatingsignal for the second modulator to produce a 1 output from the secondmodulator.

In yet another embodiment of the invention, a binary phase shift keyingmodulator is formed of serially coupled first and second modulators. Abinary information signal is applied to an encoder that provides adifferent modulating signal to each of the first and second modulators.In response to succeeding “ones” in the information signal, the encoderrandomly forms a −1 and 1 modulating signal for the first modulator anda 1 and −1 modulating signal for the second modulator to produce a −1output from the second modulator. In response to succeeding “zeros” inthe information signal, the encoder randomly forms a −1 and 1 modulatingsignal for the first modulator and a −1 and 1 modulating signal for thesecond modulator to produce a 1 output from the second modulator.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing a prior art modulator system usingfeedback for carrier suppression control;

FIG. 2 is a general block diagram of a carrier suppression modulatorillustrative of the invention;

FIGS. 3A, 3B and 3C illustrate the modulated outputs obtained in thecarrier suppression modulator of FIG. 2 with increased carriersuppression at each successive stage;

FIG. 4 is a block diagram of one embodiment of a carrier suppressionmodulator arrangement according to the invention that utilizespseudo-random type modulating signals;

FIG. 5 is a general block diagram of a carrier suppressed BPSK modulatorillustrative of the invention;

FIG. 6 is a detailed block diagram of one type of carrier suppressedBPSK modulator of FIG. 5;

FIG. 7 is a timing diagram illustrating the operation of the carriersuppressed BPSK modulator of FIG. 6;

FIG. 8 is a detailed block diagram of a type of encoder for the carriersuppressed BPSK modulator of FIG. 5;

FIG. 9 is a detailed block diagram of another type of encoder for thecarrier suppressed BPSK modulator of FIG. 5;

FIG. 10 is a general block diagram of a carrier suppressed quadraturephase shift keying (QPSK) modulator;

FIG. 11 is a flow chart illustrating the operation of the carriersuppressed QPSK modulator of FIG. 10 wherein a rotating sets ofmodulating signals are formed for input data; and

FIG. 12 is a flow chart illustrating the operation the carriersuppressed QPSK modulator of FIG. 10 in wherein modulating signals forinput data are randomly selected.

DETAILED DESCRIPTION OF THE INVENTION

To provide carrier suppression of an RF modulator, it is necessary toprecisely adjust the modulator characteristics to balance offsets ingain, phase and leakage. For a balanced modulator that uses I and Qinputs, carrier suppression is determined primarily by the DC voltagematching of the signals applied to the I and Q input stages of themodulator, the amplitude balance of the modulator and the carrierleakage. In accordance with the invention, plural modulators areserially coupled to further increase carrier suppression. FIG. 2 shows ageneral block diagram of a carrier suppression modulator according tothe invention. In FIG. 2, there is shown an encoder 201 and seriallycoupled modulators 205-1, 205-2, . . . , 205-n−1 and 205-n. The serialcoupled modulators, for example, may be real or complex analog ordigital multipliers. A carrier is applied to a carrier input tomodulator 205-1. The output of the modulator 205-1 is applied to thecarrier input of modulator 205-2 and, in like manner, the carrier inputof each modulator in the modulator chain is coupled to the output of thepreceding modulator. An information signal 215 is applied to an input ofthe encoder 201. The information signal may be an analog signal or adigital signal either real or complex. The encoder 201 provides amodulating signal to each of the modulators 205-1 through 205-n. Theencoder 201 operates to form the modulating signals such that theproduct of the modulating signals applied at each instant of time to themodulators corresponds to the information signal. If the informationsignal 215 is an analog signal or a QAM type signal, the modulatingsignals formed for one set of modulators, e.g., modulators 205-1, 205-3. . . and 205-n-1 may be arbitrarily selected while the signals formedfor the remaining modulators, e.g., modulators 205-2, 205-4 . . . and205-n are reciprocals of the modulating signals formed for themodulators 205-1, 205-3 . . . and 205-n-1. The analog or QAM informationsignal 215 is multiplied by the modulating signal formed for one or moreof the modulators and the resulting product signal is supplied to thatmodulator. It is to be understood that other arrangements of applyingthe modulating signals and the reciprocal modulating signals and theinformation signals to the modulators may be used where the product ofthe modulating signals corresponds to the information signal.

FIGS. 3A, 3B and 3C illustrate the outputs of the modulator 205-1, 205-2and 205-n, respectively. As shown in FIG. 3A, the output of modulator205-1 has a carrier component 305. The modulator output 301 shown inFIG. 3A (i.e., residual carrier and modulation components) is applied tothe carrier input of the modulator 205-2 that further suppresses thecarrier and provides a lower carrier level 315 in its output 310 shownin FIG. 3B. Each successive modulator operates to reduce the carrierlevel so that the output 320 of the last modulator 205-n shown in FIG.3C has an extremely suppressed carrier 325. Since the arbitrarilyselected modulating signals are applied to one set of modulators andreciprocals of the selected modulating signals are applied to the otherset of modulators, the modulating component of the output 320 of thelast modulator 205-n corresponds to the information signal supplied toone of the modulators. Typically, an individual RF modulator reliablyprovides 20 dB of carrier suppression. Accordingly, the serial couplingof n modulators as in FIG. 2 provides a much higher carrier suppressionof 20*n dB.

There is shown in FIG. 4, a carrier suppression modulator illustrativeof the invention in which a non-pseudo-random modulating signal isapplied to a first of a pair of modulators and the product of thereciprocal of the non-zero pseudo-random modulating signal and an analoginformation signal is applied as the modulating signal of a second ofthe modulator pair. As in the carrier suppression arrangement of FIG. 2,the carrier suppression of the first modulator is enhanced by thefurther carrier suppression of the second modulator and the secondmodulator output has an extremely suppressed carrier reduced by a factorof 2 on a logarithmic scale relative to single modulator suppressionwith a modulation component that corresponds to the analog informationsignal. By randomly varying the modulating signals, the signals on eachmodulator are effectively decorrelated so that the carrier suppressionof each individual modulator is improved without a need for preciseadjustments.

The carrier suppression modulator of FIG. 4 has quadrature amplitudemodulators 425 and 430 and an encoder 400. In the encoder 400, there isa pseudo-random signal generator 403, a reciprocal forming circuit 410,a phase negating circuit 415, a combiner circuit 420 and signal formers401 and 405. In operation, a carrier signal is coupled to a carrierinput of the modulator 425 and an information signal Inf(t) 440 iscoupled to the input of the encoder 400. The output of the modulator 425is coupled to the carrier input of the modulator 430 and the output ofthe modulator 430 provides a carrier suppressed modulated signal S(t).The pseudo-random signal generator 403 generates a non-zeropseudo-random signal A(t) and a pseudo-random phase signal φ(t). SignalsA(t) and φ(t) are applied to signal former 401 which forms the in-phaseand the quadrature phase signals as follows:I1(t)=A(t)cos φ(t) andQ1(t)=A(t)sin φ(t).

The I1(t) and Q1(t) signals are supplied to the I and Q modulatingsignal inputs of the first modulator 425.

The combiner 420 receives the information signal Inf(t), a signal 1/A(t)from the reciprocal circuit 410 and a signal −φ(t) from phase negatingcircuit 415. These signals are combined to form a product signal(inf(t))(−φ(t))/A(t) which is received by the signal former 405. Theoutputs of the signal former 405 are as follows:I2(t)=[Inf(t)][1/A(t)]cos(−φ(t))Q2(t)=[Inf(t)][1/A(t)]sin(−φ(t)).

For digital high speed implementation, a synchronizer 435 operates tosynchronize or re-clock the outputs of signal formers 401 and 405 sothat at any instant of time, the I1(t), Q1(t) signals from the signalformer 401 are simultaneous with the corresponding I2(t), Q2(t) signalsfrom the signal former 405 whereby the output of modulator 430corresponds to the information signal Inf(t). The modulator 430 receivesthe modulating signals I2(t) and Q2(t) as its modulating signals and theoutput of the modulator 425 at its carrier input. The reciprocalmodulating signal at modulator 430 operates to cancel the modulationcomponent of the output of the modulator 425 corresponding to the nonzero pseudo-random signal applied thereto and produces a suppressedcarrier modulated signal S(t) corresponding to the information signalInf(t). The information signal may be of any form, e.g., an analogsignal or a QAM signal.

FIG. 5 shows a block diagram of a carrier suppression modulator for aBPSK information signal in accordance with the invention. As is wellknown, the output of a BPSK modulator has two 180 degree out-of-phaseoutputs. One output phase corresponds to a “1” and the other outputphase corresponds to “−1”. In FIG. 5, there is an encoder 501 andmodulators 505 and 510. The encoder 501 operates as a signal former toprovide a modulated signal at the output of modulator 510 thatcorresponds to an input data signal. A carrier signal is applied to thecarrier input of the modulator 505. The output of the modulator 505 iscoupled to the carrier input of the modulator 510. A digital informationsignal is applied to the encoder 501 that supplies a modulating signalQ1 to a modulation input of the modulator 505 and a modulating signal Q2to the modulation input of the modulator 510. In the encoder 501, aninput information signal is processed to form a Q1 modulating signal forthe modulator 505 and Q2 modulating signal for the modulator 510. Inprocessing the digital information signal, succeeding input informationbits of one type generate a varying pattern of Q1 and Q2 signals suchthat each product of the Q1 and Q2 signals for one information bitcorresponds to that information bit. As a result, the modulationcomponent of output of the modulator 505 is modified by the modulator510 to provide a modulation component corresponding to the informationbit.

A detailed block diagram of one embodiment of the a modulator systemutilizing the encoder 501 is shown in FIG. 6. The circuit of FIG. 6operates to provide alternating 1, −1 and 1, 1 modulating signals forsucceeding “1” data bits in the information signal and alternating 1, 1and −1, −1 for succeeding “0” data bits in the information signal. Table1 indicates the function of the encoder 501 in providing modulatingsignals Q1 and Q2.

TABLE 1 MODULATING MODULATING OUTPUT DATA SIGNAL Q1 SIGNAL Q2 SIGNAL 1−1 1 −1 1 1 −1 −1 0 1 1 1 0 −1 −1 1

As shown in table 1, a binary 0 data input produces a 1 output signal byforming either Q1=1 and Q2=1 modulating signals or Q1=−1 and Q2=−1modulating signals. A binary 1 data input produces a −1 output signal byforming either Q1=1 and Q2=−1 modulating signals or Q1=−1 and Q2=1modulating signals. The encoder 501 operates to alternately form Q1=1,Q2=1 and Q1=−1, Q2=−1 modulating signals for succeeding binary 0 datainputs which produces a 1 modulated output from the modulator 510 andoperates to alternately form Q1=1, Q2=−1 and Q=−1, Q2=1 modulatingsignals for succeeding 1 binary data inputs which produces a −1modulated output from the modulator 510. The alternately formedmodulating signals varies the modulation content and therebydecorrelates the modulation to further suppress the carrier component ofthe output signal from the modulator 510.

Referring to FIG. 6, there are shown D type flip flops 620, 625, 660 and665, input gates 610 and 615, logic array gates 630, 635, 640, 645, 650and 655, inverters 611, 613 and 668 and driver amplifiers 670 and 680.As is well known, a D type flip flop changes its state to that of the Dinput upon being clocked. In response to each “1” data bit at a positiveclock transition, gate 610 is enabled and causes flip flop 620 totoggle. Input gate 615 is enabled in response to each “0” data bit at apositive clock transition so that the flip flop 625 is toggled. In theevent that a “1” data bit occurs when the QA output of flip flop 620 isa one and the QA′ output is a zero, the QA′ output of flip flop 620becomes a one. AND gate 640 is then enabled and AND gates 630 and 635are inhibited. As a result, flip flop 660 is set in its zero state andthe Q1 output becomes “−1”. Flip flop 665 is set in its one state by theoutput of enabled gate 640 and the Q1 output is “1”. The next “1” databit toggles flip flop 620 so that the QA output is a one. AND gate 630is then enabled while AND gates 640 and 645 are inhibited. Flip flop 660is then set in its one state by enabled gate 630 through OR gate 650 andthe Q1 output is a “1” while flip flop 665 is set in its zero state toproduce a “−1” Q2 output.

When a “0” data input bit occurs, flip flop 625 is toggled, e.g., to itsone state. AND gate 635 is enabled by the QB output of flip flop 625 andthe data. AND gate 645 is enabled by the data input through inverter 611and the output of inverter 668. As a result, flip flop 660 is set in itsone state by the next clock transition through OR gate 650 and flip flop665 is set in its one state through OR gate 655. The Q1 output becomes a“1” and the Q2 output becomes a “1”. In response to the next “0” databit, flip flop 625 is toggled to its zero state through AND gate 615.AND gates 630 and 640 are inhibited by the “0” data input. AND gate 635is inhibited by the zero state of flip flop 625 and AND gate 645 isinhibited by the output of inverter 668. In response to no outputs of ORgate 650 and 655, flip flops 660 and 665 are placed in their zero statesso that the Q1 output is “−1” and the Q2 output is “−1”. In this way,the Q1, Q2 modulating signals for succeeding “1” data bits alternatebetween 1, −1 and −1,1 and the Q1, Q2 modulating signal for succeeding“0” data bits alternate between 1, 1 and −1, −1.

The clocking of the flip flops 660 and 665 is arranged so that the dataat the Q1 output of flip flop 660 and the Q2 output of flip-flop 665 arestable for the duration of high clock pulses and a short period beforeand after the clock is high. The outputs of flip flops 660 and 665 arecoupled to the modulating signal inputs of modulators 675 and 685through driver amplifiers 670 and 680, respectively. Amplifiers 670 and680 convert the logic signals Q1 and Q2 into modulator drive signalscompatible with the multiplying type modulators 675 and 685 andcapacitors 671 and 681 provide AC coupling to the modulating signalinputs of modulators 675 and 685.

FIG. 7 is a timing diagram illustrating the operation of the encoder 501of FIG. 5 as implemented in FIG. 6. As shown in FIG. 7, a “1” datasignal 705 between t0 and t1 results in Q1=1, Q2=−1 modulating signals710 and 715 between t1 and t2. The next “1” data signal 705 between t2and t3 results in Q1=−1, Q2=1 modulating signals 710 and 715 between t3and t4 and the succeeding “1” data signal between t4 and t5 results inQ1=1, Q2=−1 modulating signals 710 and 715 between t5 and t6. A “0” datasignal 705 between t1 and t2 provides Q1=1, Q2=1 modulating signals 710and 715 between t2 and t3. The next “0” data signal 705 between t3 andt4 sets Q1=−1, Q2=−1 modulating signals 710 and 715 between t4 and t5and the succeeding “0” data signal 705 between t5 and t6 sets Q1=1, Q2=1modulating signals 710 and 715 between t6 and t7. The output of themodulator 685 for 1,1 and −1,−1 modulating signals is a −1 correspondingto a 0 data signal input and the output of the modulator 685 for −1, 1and 1, −1 modulating signals corresponds to a 1 data signal input. Inaccordance with the invention, the product of the modulating signalsbeing applied to the series coupled modulators corresponds to the inputdata signal and the modulating signals for succeeding same bit in thedata signal alternates to provide decorrelation of the modulatingsignals to improve carrier suppression of the series coupled modulators.

In accordance with the invention, each modulating signal Q1 and Q2 mayhave a zero value DC component while the output signal has a non-zerovalue. As shown in FIG. 7, the Q1 signal 710 alternates between 1,−1states and −1,1 states starting from the even clock cycles. Similarly,the Q2 signal 715 alternates between the 1,−1 and −1,1 states startingafter odd clock cycles. This BIPHASE-L type of encoding assures a zeroDC value for Q1 and Q2 so that they may be AC coupled through capacitors671 and 681 into the modulators 675 and 685 to prevent any carrierincrease due to DC offsets in the modulating signal drivers 670 and 680even though the resultant output modulated signal may have a non-zero,DC or carrier component.

Another type of encoder for the BPSK carrier suppression modulator thatmay be used for the BPSK carrier suppression modulator of FIG. 5 isshown in FIG. 8. In FIG. 8, there are D type flip flops 801 and 805 andan exclusive nor gate 810. The flip flop 801 has a clock input. A Qa′output of the flip flop 801 is coupled to its D input so that the flipflop 801 toggles at each positive clock transition. The Qa output ofFlip flop 801 provides the Q1 modulating signal for the modulator 505 ofFIG. 5. The flip flop 805 receives a data signal at its D input so thatthe Qb output of the flip flop 805 is clocked by the clock positivetransition to follow the data signal applied to its D input. Theexclusive NOR gate 810 operates to provide a Q2=“1” modulating signalwhen the Qa input from the flip flop 801 is the same as the Qb inputfrom the flip flop 805 and to provide a Q2=“−1” modulating signal whenthe Qa input from the flip flop 801 is different from the Qb input fromthe flip flop 805.

The output Qa from flip flop 801 is applied to the D input of a flipflop 825 and the output of the exclusive NOR circuit 810 is applied tothe D input of a flip flop 830. The clock inputs to the flip flops 825and 830 are supplied through the inverter 815. The Q1 and Q2 outputs ofthe flip flops 825 and 830 are then supplied to the modulating signalinputs of the modulators 505 and 510 in FIG. 5. Flip flops 825 and 830and the inverter 815 operate to synchronize the Q1 and Q2 modulatingsignals so that the Q1 and Q2 data are stable for the duration of thehigh clock signal and short intervals before and after the high clocksignal. At higher frequencies where the exclusive NOR gate 810propagation delays become significant, the delay between the Q1 and Q2modulating signals can create out-of-band energy to reduce the modulatoreffectiveness. By reclocking with flip flops 825 and 830, the timingerrors between the Q1 and Q2 modulating signals are minimized.

The operation of the encoder of FIG. 8 is illustrated in Table 2.

TABLE 2 TIME 1 2 3 4 5 6 7 8 9 10 DATA 1 0 1 1 0 0 0 1 1 1 Q1 1 −1 1 −11 −1 1 −1 1 −1 Q2 1 1 1 −1 −1 1 −1 −1 1 −1 OUT 1 −1 1 1 −1 −1 −1 1 1 1

Referring to Table 2, there is shown an example of a modulating signalsequence for DATA for TIME periods 1 through 10. The Q1 modulatingsignal corresponds to the toggling output Qa from the flip flop 801 andthe Q2 modulating signal corresponds to the output of the exclusive NORgate 810. In the time period 1, the data signal is “1” and the Qa outputof the flip flop 801 is 1. Since both the data and the Q1 inputs to theexclusive NOR gate 810 are the same, the Q2 modulating signal is “1” andthe output of the modulator 510 which corresponds to the product of Q1and Q2 is “1”. In the time period 2, the data signal is “0” and the Qaoutput of the flip flop is “0” so that the Q1 modulating signal is “−1”.The data signal and the Qa output are different whereby the Q2modulating signal is “−1”. As is readily seen from Table 2, the Q1modulating signals for succeeding “1”s in the data signal and forsucceeding “0”s in the data signal vary according to the state of the Qaoutput of the flip flop 801 while the Q2 modulating signals forsucceeding “1”s in the data signal and for succeeding “0”s in the datasignal vary based on the state of the toggling flip flop 801. In eachtime period, however, the product of the Q1 and the Q2 modulatingsignals corresponds to the input data signal.

In FIG. 9, there is shown another encoder arrangement for the BPSKmodulator of FIG. 5 in which a pseudo-random number generator issubstituted for the toggling flip flop 801 of FIG. 8. Referring to FIG.9, a pseudo-random number generator 901 receives a clock input andprovides a random output RDN and a D type flip flop 905 receives a clockinput and a data signal at its D input. The Qb output of the flip flop905 is applied to one input of an Exclusive NOR gate 910 and theExclusive NOR gate receives another input from the pseudo-random numbergenerator 901. The exclusive NOR gate 910 operates to form a “1” whenits pseudo-random number and data inputs are the same and to form a “−1”when its pseudo-random number and data inputs are different so that theproduct of the Q1 and Q2 modulating signals to be applied to themodulators 505 and 510 in FIG. 5 always corresponds to the input datasignal. As described with respect to FIG. 8, the modulating signals forsucceeding “1”s and the modulating signals for succeeding “−1”s vary,but pseudo-randomly rather than according to a toggling flip flop.

The output RDN from pseudo-random number generator 901 is applied to theD input of a flip flop 925 and the output of the exclusive NOR circuit910 is applied to the D input of a flip flop 930. The clock input to theflip flops 925 and 930 is supplied through the inverter 915. The Q1 andQ2 outputs of the Flip flops 925 and 930 are then supplied to themodulating signal inputs of the modulators 505 and 510 in FIG. 5. Flipflops 925 and 930 and the inverter 915 operate as described with respectto FIG. 8 to synchronize the Q1 and Q2 modulating signals to compensatefor exclusive NOR gate 910 delays so that the Q1 and Q2 data are stablefor the duration of the high clock signal and short intervals before andafter the high clock signal at higher frequencies.

A suppressed carrier QPSK modulator according to the invention is shownin FIG. 10. In FIG. 10, there are serially coupled carrier suppressiontype modulators 1025 and 1030 and an encoder 1000. In the signal formertype encoder 1000, there is a modulator signal address circuit 1005 anda modulator signal table 1010. A carrier is supplied to a carrier inputof the modulator 1025. An in-phase modulating signal I1(t) and aquadrature-phase signal Q1(t) are applied to the in-phase and quadraturephase inputs of the modulator 1025 from the encoder 1000. The outputsignal from the modulator 1025 is coupled to the carrier input of themodulator 1030 and the modulator 1030 receives an in-phase modulatingsignal I2(t) and a quadrature-phase modulating signal Q2(t) at itsmodulating signal inputs.

The encoder 1000 operates to convert a QPSK information signal Inf(t)which has an in-phase component I(t) and a quadrature-phase componentQ(t) into the modulating signals I1(t), Q1(t), I2(t) and Q2(t). Theconversion in the encoder 1000 is arranged so that succeedingoccurrences of a given input symbol provides a varying modulating signalfor each of the modulators 1025 and 1030. A modulator signal addresscircuit 1005 receives the successive I,Q data bits of the informationsignal and the modulator signal table 1010 is addressed by the modulatorsignal address circuit 1005 to provide the different modulating signalsfor the modulator 1025 and the modulator 1030. The varying modulatingsignals I1(t), Q1(t), I2(t) and Q2(t) for same symbol sets decorrelatesthe DC offsets in the modulators and enhances carrier suppression. Table3 shows an example of the modulator signal table.

TABLE 3 INPUT MOD 1 MOD 1 MOD 2 MOD 2 OUT I, Q n I1 Q1 I2 Q2 I OUT Q −1,−1 n1 = 1 1 1 −1 −1 −1 −1 −1, −1 n1 = 2 −1 1 1 −1 −1 −1 −1, −1 n1 = 3 1−1 −1 1 −1 −1 −1, −1 n1 = 4 −1 −1 1 1 −1 −1 −1, 1   n2 = 1 −1 1 1 1 −1 1−1, 1   n2 = 2 −1 −1 1 −1 −1 1 −1, 1   n2 = 3 1 1 −1 1 −1 1 −1, 1   n2 =4 1 −1 −1 −1 −1 1   1, −1 n3 = 1 1 1 1 −1 1 −1   1, −1 n3 = 2 1 −1 1 1 1−1   1, −1 n3 = 3 −1 1 −1 −1 1 −1   1, −1 n3 = 4 −1 −1 −1 1 1 −1 1, 1 n4= 1 1 1 1 1 1 1 1, 1 n4 = 2 −1 1 −1 1 1 1 1, 1 n4 = 3 1 −1 1 −1 1 1 1, 1n4 = 4 −1 −1 −1 −1 1 1

The “INPUT” column of table 3 lists the possible values for each symbolof the input I, Q data symbols of the information signal. The column “n”identifies the several sets of I1, Q1 and I2, Q2 symbols of themodulating signals for each input symbol. The four “n1” rows identifythe I1, Q1 and I2, Q2 modulating signals that provide a modulated outputfrom the modulator 1030 corresponding to the information signal I=−1,Q=−1. The four “n2” rows identify the I1, Q1 and I2, Q2 symbols thatprovide a modulated output from the modulator 1030 corresponding to theinformation signal I=−1, Q=1. The four “n3” rows identify the I1, Q1 andI2, Q2 symbols that provide a modulated output from the modulator 1030corresponding to the information signal I=1, Q=−1 and the four “n4” rowsidentify the I1, Q1 and I2, Q2 symbols that provide a modulated outputfrom the modulator 1030 corresponding to the information signal I=1,Q=1. The modulating signals for each “n” address are selected so thatthe product of the in-phase modulating signals corresponds to thein-phase component of the input information signal and the product ofthe quadrature phase modulating signals corresponds to the quadraturephase component of the information signal.

FIG. 11 is a flow chart that illustrates the operation of one type ofencoder 1000 in FIG. 10. Referring to FIG. 11, the symbol addressindices n1, n2, n3 and n4 in the modulating signal address circuit 1005are initially set to 1 in a step 1101 and the next information signalinput data is obtained by the modulating signal address circuit 1005 ina step 1103. When the input data is I=−1, Q=−1, a step 1110 is enteredfrom the step 1103 through a decision step 1105. In the step 1110 forn1=1, the symbols I1=1, Q1=1, I2=−1 and Q2=−1 in the modulating signaltable are addressed and are output to the modulators 1025 and 1030 in astep 1113. n1 is incremented in a step 1115 and the step 1103 isreentered though a decision step 1120. If n1=4, n1 is reset to 1 in astep 1125 before the step 1103 is reentered. As a result, a differentone of the four sets of I1, Q1, I2 and Q2 symbols is selected for eachoccurrence of an I=−1, Q=−1 input data symbol set and these symbol setsfrom the modulating signal table 1010 are applied in rotating order asmodulating signals for succeeding I=−1, Q=−1 input data symbol sets. Theproduct of (I1)(I2) for each of modulating signals of the set for n1 is−1 corresponding to the input data in-phase I symbol and the product(Q1)(Q2) for each of the modulating signals of the set for n1 is −1corresponding to the input data quadrature phase Q symbol.

When the input data is I=−1, Q=1, a step 1135 is entered from the step1103 through a decision step 1130. In the step 1135 for n2=1, thesymbols I1=−1, Q1=1, I2=1 and Q2=1 in the modulating signal table areaddressed and are output to the modulators 1025 and 1030 in a step 1138.n2 is incremented in a step 1140 and the step 1103 is reentered though adecision step 1145. If n2=4, it is reset to 1 in a step 1150 before thestep 1103 is reentered. As a result, a different one of the four sets ofI1, Q1, I2 and Q2 symbols is selected for each occurrence of an I=−1,Q=1 input data symbol set and these symbol sets from the modulatingsignal table 1010 are applied in rotating order as modulating signalsfor succeeding I=−1, Q=1 input data symbol sets. The product of (I1)(I2)for each of modulating signals of the set for n2 is −1 corresponding tothe input data in-phase I symbol and the product (Q1)(Q2) for each ofthe modulating signals of the set for n2 is 1 corresponding to the inputdata quadrature phase Q symbol.

When the input data is I=1, Q=−1, a step 1160 is entered from the step1103 through a decision step 1155. In the step 1160 for n3=1, the datasymbols I1=1, Q1=1, I2=1 and Q2=−1 in the modulating signal table areaddressed and are output to the modulators 1025 and 1030 in a step 1163.n3 is incremented in a step 1165 and the step 1103 is reentered though adecision step 1170. If n3=4, it is reset to 1 in a step 1175 before thestep 1103 is reentered. As a result, a different one of the four sets ofI1, Q1, I2 and Q2 symbols is selected for each occurrence of an I=1,Q=−1 input data symbol set and these symbol sets from the modulatingsignal table 1010 are applied in rotating order as modulating signalsfor succeeding I=1, Q=−1 input data symbols. The product of (I1)(I2) foreach of modulating signals of the set for n3 is 1 corresponding to theinput data in-phase I symbol and the product (Q1)(Q2) for each of themodulating signals of the set for n3 is −1 corresponding to the inputdata quadrature phase Q symbol.

When the input data is I=1, Q=1, a step 1185 is entered from the step1103 through a decision step 1180. In the step 1185 for n4=1, the datasymbols I1=1, Q1=1, I2=1 and Q2=1 in the modulating signal table areaddressed and are output to the modulators 1025 and 1030 in a step 1190.n4 is incremented in a step 1192 and the step 1103 is reentered though adecision step 1195. If n4=4 in a step 1195, it is reset to 1 in a step1198 before the step 1103 is reentered. As a result, a different one ofthe four sets of I1, Q1, I2 and Q2 symbols is selected for eachoccurrence of an I=1, Q=1 input data symbol set and these symbol setsfrom the modulating signal table 1010 are applied in rotating order asmodulating signals for succeeding I=1, Q=1 input data symbol sets. Theproduct of (I1)(I2) for each of modulating signals of the set for n4 is1 corresponding to the input data in-phase I symbol and the product(Q1)(Q2) for each of the modulating signals of the set for n4 is 1corresponding to the input data quadrature phase Q symbol.

FIG. 12 is a flow chart illustrating the operation of another type ofcircuit that may be used as the encoder 1000 in which the modulatorsignal address circuit 1005 utilizes a random number generator toaddress the modulating signal table 1010. In FIG. 12, the modulatorsignal address circuit 1005 receives the next input data symbol set fromthe information signal Inf(t) in a step 1205. If the input data symbolset is I=−1, Q=−1, a step 1215 is entered from the step 1205 through adecision step 1210. In the step 1215, a pseudo-random number from 1 to 4is generated for the addressing index n1 and a corresponding set ofmodulating signals is selected from the modulating signal table 1010.For n1=2, for example, the symbol set I1=−1, Q1=1, I2=1 and Q2=−1 isselected in the table 1010, the modulating signals I1=−1, Q1=1 areapplied to the modulator 1025 and the modulating signal I2=1 and Q2=−1are applied to the modulator 1030 in FIG. 10 in a step 1220. Control isthen returned to the step 1205 to process the next input data symbolset.

When the next input data symbol set is I=−1, Q=1, a pseudo-random numbergenerating step 1230 is entered from the step 1205 through a decisionstep 1225. In the step 1230, a pseudo-random number from 1 to 4 isgenerated for the addressing index n2 and a corresponding set ofmodulating signals is selected from the modulating signal table 1010.For n2=3, for example, the symbol set I1=1, Q1=1, I2=−1 and Q2=1 isselected in the table 1010, the modulating signals I1=−1, Q1=1 areapplied to the modulator 1025 and the modulating signals I2=−1 and Q2=−1are applied to the modulator 1030 in FIG. 10 in a step 1235. Control isthen returned to the step 1205 to process the next input data symbolset.

Upon receipt of a data symbol set I=1, Q=−1 by the modulator signaladdress circuit 1005, a pseudo-random number generating step 1245 isentered from the step 1205 through a decision step 1240. In the step1245, a pseudo-random number from 1 to 4 is generated for the addressingindex n3 and a corresponding set of modulating signals is selected fromthe modulating signal table 1010. For n3=4, for example, the symbol setI1=−1, Q1=−1, I2=−1 and Q2=1 is selected in the table 1010, themodulating signals I1=−1, Q1=−1 are applied to the modulator 1025 andthe modulating signal I2=−1 and Q2=1 are applied to the modulator 1030in FIG. 10 in a step 1250. Control is then returned to the step 1205 toprocess the next input data symbol set.

If the an input data symbol set received by the modulator addresscircuit 1005 is I=1, Q=1, a pseudo-random number generating step 1260 isentered from the step 1205 through a decision step 1255. In the step1260, a pseudo-random number from 1 to 4 is generated for the addressingindex n4 and a corresponding set of modulating signals is selected fromthe modulating signal table 1010. For n4=1, for example, the symbol setI1=1, Q1=1, I2=1 and Q2=1 is selected in the table 1010, the modulatingsignals I1=1, Q1=1 are applied to the modulator 1025 and the modulatingsignal I2=1 and Q2=1 are applied to the modulator 1030 in FIG. 10 in astep 1265. Control is then returned to the step 1205 to process the nextinput data symbol set.

In the modulating signal table 1010, The product of the I1 and I2modulating signals for each n indexed set of modulating signalscorresponds to the I component of the information signal and the productof the Q1 and Q2 modulating signals for each n indexed set of modulatingsignals corresponds to the Q component of the information signal.Accordingly, the modulation component of the output of the modulator1030 corresponds to the information signal and the carrier applied tothe carrier input of the modulator 1025 is successively suppressed inthe modulators 1025 and 1030. Since the modulating signals formed in theoperation of the encoder according to FIG. 12 are randomly selected, theoffsets that occur among the modulating signals in the modulators 1025and 1030 are decorrelated to further suppress the carrier in the circuitof FIG. 10.

While the invention has been described by way of particular illustrativeembodiments, it may be utilized at any frequency across theelectromagnetic RF and optical spectrum, for acoustic or elastic wavesor in any other wave propagation type medium. For example, it may beimplemented in systems where carrier suppressed modulation is neededsuch as for systems where transmissions are limited in power density byregulation, in sideband modulators and demodulators, in code divisionmultiple access systems, in spread spectrum systems, in optical systemsrequiring coherence reduction or wavelength multiplexing, in opticalfrequency translation arrangements, in direct modulation or directdemodulation systems and for frequency plans requiring reduction ofspurious and/or intermodulation products. It is therefore to beunderstood that the invention is not limited to the above-describedembodiments but that those of ordinary skill in the art may make variouschanges and modifications without departing from the scope and spirit ofthe invention. Accordingly, the foregoing embodiments should not beconstrued as limiting the scope of the invention, which is encompassedinstead by the following claims.

1. Apparatus for modulating a carrier with an information signal,comprising: a plurality of serially coupled modulators, each including acarrier input, a modulating signal input and a modulated carrier output,a carrier being coupled to the carrier input of a first of the seriallycoupled modulators and the modulated carrier output of each modulatorbeing coupled to the carrier input of a succeeding modulator; and anencoder responsive to the information signal for generating modulatingsignals to be applied to the modulating signal inputs of the seriallycoupled modulators, such that a product of the modulating signals formsthe information signal, wherein, the modulating signals applied to eachmodulator of the serially coupled modulators modify the modulatedcarrier output received at the carrier input of the respective modulatorto produce a carrier suppressed information signal modulated output atthe last of the serially coupled modulators.
 2. Apparatus for modulatinga carrier according to claim 1, wherein the modulating signals appliedto one of the plurality of serially coupled modulators produce amodulation component in the modulator output of the one of the seriallycoupled modulators that substantially removes a modulating componentproduced by a preceding modulator of the plurality of serially coupledmodulators and the modulating signals applied to any one of theplurality of serial coupled modulators also includes the informationsignal.
 3. Apparatus for modulating a carrier according to claim 2,wherein the plurality of serially coupled modulators includes first andsecond modulators, the modulating signal applied to one of the first andsecond modulators includes a component that is a reciprocal of themodulating signal applied to the other of the first and secondmodulators.
 4. Apparatus for modulating a carrier according to claim 3,wherein the information signal is an analog signal.
 5. Apparatus formodulating a carrier according to claim 3, wherein the informationsignal is a QAM signal.
 6. Apparatus for modulating a carrier accordingto claim 3, wherein the modulating signal applied to the first modulatoris a pseudo-random signal.
 7. Apparatus for modulating a carrieraccording to claim 3, wherein the modulating signal applied to the firstmodulator is a periodically varying signal.
 8. Apparatus for modulatinga carrier according to claim 1, wherein the plurality of seriallycoupled modulators includes first and second modulators that performbinary phase shift keying, the modulating signals applied to the firstand second modulators for succeeding “one” symbols in the informationsignal alternate between (1,−1) and (−1,1) and the modulating signalsapplied to the first and second modulators for succeeding “zero” symbolsin the information signal alternate between (−1,−1) and (1,1). 9.Apparatus for modulating a carrier according to claim 1, wherein theplurality of serially coupled modulators includes first and secondmodulators that perform binary phase shift keying, the modulatingsignals applied to the first and second modulators (Q1, Q2) forsucceeding “one” symbols in the information signal randomly vary between(1,−1) and (−1,1) and the modulating signals applied to the first andsecond modulators for succeeding “zero” symbols in the informationsignal randomly vary between (−1,−1) and (1,1).
 10. Apparatus formodulating a carrier wave according to claim 1, wherein the plurality ofserially coupled modulators includes first and second modulators thatperform quadrature phase shift keying, the modulating signals applied tothe first and second modulators for succeeding I=−1,Q=−1's in theinformation signal rotate among I,Qs of (1,1) (−1,−1), (−1,−1) (1,1),(1,−1) (−1,1), (−1,−1) (1,1), the modulating signals applied to thefirst and second modulators for succeeding I=−1,Q=1's in the informationsignal rotate among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1),(1,−1) (−1,−1 ), the modulating signals applied to the first and secondmodulators for succeeding I=1,Q=−1's in the information signal rotateamong I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1,−1) (−1,1)and the modulating signals applied to the first and second modulatorsfor succeeding I=1,Q=1's in the information signal rotate among I,Qs of(1,1) (1,1), (−1,1) (1,1), (−1,1) (−1,1), (1,−1 ) (1,−1).
 11. Apparatusfor modulating a carrier wave according to claim 1, wherein theplurality of serially coupled modulators includes first and secondmodulators that perform quadrature phase shift keying, the modulatingsignals applied to the first and second modulators for succeedingI=−1,Q=−1's in the information signal are randomly selected among I,Qsof (1,1) (−1,−1), (−1,−1) (1,1), (1,−1) (−1,1), (−1,−1) (1,1), themodulating signals applied to the first and second modulators forsucceeding I=−1,Q=1's in the information signal are randomly selectedamong I,Qs of (−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1), (1,−1)(−1,−1), the modulating signals applied to the first and secondmodulators for succeeding I=1,Q=−1's in the information signal arerandomly selected among I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1)(−1,−1), (−1,−1) (−1,1), and the modulating signals applied to the firstand second modulators for succeeding I=1,Q=1's in the information signalare randomly selected among I,Qs of (1,1) (1,1), (−1,1), (1,1), (−1,1)(−1,1), (1,−1)(1,−1).
 12. Apparatus for modulating a carrier waveaccording to claim 1, wherein the plurality of serially coupledmodulators includes first and second modulators that perform quadraturephase shift keying, the modulating signals applied to the first andsecond modulators for succeeding I=−1,Q=−1's in the information signalare periodically changed among I,Qs of (1,1) (−1,−1), (−1,−1) (1,1),(1,−1) (−1,1), (−1,−1) (1,1), the modulating signals applied to thefirst and second modulators for succeeding I=−1,Q=1's in the informationsignal are periodically changed among I,Qs of (−1,1) (1,1), (−1,−1)(1,−1), (1,1) (−1,1), (1,−1) (−1,−1), the modulating signals applied tothe first and second modulators for succeeding I=1,Q=−1's in theinformation signal are periodically changed among I,Qs of (1,1) (1,−1),(1,−1) (1,1), (−1,1) (−1,−1), (−1,−1) (−1,1), and the modulating signalsapplied to the first and second modulators for succeeding I=1,Q=1's inthe information signal are periodically changed among I,Qs of (1,1)(1,1), (−1,1) (1,1), (−1,1) (−1,1), (1,−1) (1,−1).
 13. A method ofmodulating a carrier with an information signal comprising the steps of:generating a plurality of modulating signals responsive to theinformation signal such that a product of the modulating signals formsthe information signal; and applying the modulating signals tomodulating signal inputs of a plurality of serially coupled modulatorseach including a carrier input and a modulated carrier output, themodulated carrier output of each modulator being coupled to the carrierinput of a succeeding modulator, wherein, the modulating signals appliedto each modulator of the serially coupled modulators modify themodulated carrier output at the carrier input of the respectivemodulator to produce a carrier suppressed information signal modulatedoutput at the last of the serially coupled modulators.
 14. A method ofmodulating a carrier with an information signal according to claim 13,wherein the modulating signals applied to one of the plurality ofserially coupled modulators produce a modulation component in themodulator output of the one of the serially coupled modulators thatsubstantially removes a modulating component produced by a precedingmodulator of the plurality of serially coupled modulators and themodulating signals applied to any one of the plurality of serial coupledmodulators also includes the information signal.
 15. A method ofmodulating a carrier with an information signal according to claim 14,wherein the plurality of serially coupled modulators includes first andsecond modulators, wherein the modulating signal applied to one of thefirst and second modulators includes a component that is a reciprocal ofthe modulating signal applied to the other of the first and secondmodulators.
 16. A method of modulating a carrier with an informationsignal according to claim 15, wherein the information signal is ananalog signal.
 17. A method of modulating a carrier with an informationsignal according to claim 14, wherein the information signal is a QAMsignal.
 18. A method of modulating a carrier with an information signalaccording to claim 14, wherein the modulating signal applied to thefirst modulator is a pseudo-random signal.
 19. A method of modulating acarrier with an information signal according to claim 14, wherein themodulating signal applied to the first modulator is a periodicallyvarying signal.
 20. A method of modulating a carrier with an informationsignal according to claim 13, wherein the plurality of serially coupledmodulators includes first and second modulators that perform binaryphase shift keying, the modulating signals applied to the first andsecond modulators (Q1, Q2) for succeeding “one” symbols in theinformation signal alternate between (1,−1) and (−1,1) and themodulating signals applied to the first and second modulators forsucceeding “zero” symbols in the information signal alternate between(−1,−1) and (1,1).
 21. A method of modulating a carrier with aninformation signal according to claim 13, wherein the plurality ofserially coupled modulators includes first and second modulators thatperform binary phase shift keying, the modulating signals applied to thefirst and second modulators (Q1, Q2) for succeeding “one” symbols in theinformation signal randomly vary between (1,−1) and (−1,1) and themodulating signals applied to the first and second modulators forsucceeding “zero” symbols in the information signal randomly varybetween (−1,−1) and (1,1).
 22. A method of modulating a carrier with aninformation signal according to claim 13, wherein the plurality ofserially coupled modulators includes first and second modulators thatperform quadrature phase shift keying, the modulating signals applied tothe first and second modulators for succeeding I=−1,Q=−1's in theinformation signal rotate among I,Qs of (1,1) (−1,−1), (−1,−1) (1,1),(1,−1) (−1,1), (−1,−1 ) (1,1), the modulating signals applied to thefirst and second modulators for succeeding I=−1,Q=1's in the informationsignal rotate among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1),(1,−1) (−1,−1), the modulating signals applied to the first and secondmodulators for succeeding I=1,Q=−1's in the information signal rotateamong I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1,−1)(−1,1), and the modulating signals applied to the first and secondmodulators for succeeding I=1,Q=1's in the information signal rotateamong I,Qs of (1,1) (1,1), (−1,1) (1,1), (−1,1) (−1,1), (1,−1) (1,−1).23. A method of modulating a carrier with an information signalaccording to claim 13, wherein the plurality of serially coupledmodulators comprises first and second modulators that perform quadraturephase shift keying, the modulating signals applied to the first andsecond modulators for succeeding I=−1,Q=−1's in the information signalare randomly selected among I,Qs of (1,1) (−1,−1), (−1,−1) (1,1), (1,−1)(−1,1), (−1,−1) (1,1), the modulating signals applied to the first andsecond modulators for succeeding I=−1,Q=1's in the information signalare randomly selected among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1), (1,1)(−1,1), (1,−1) (−1,−1), the modulating signals applied to the first andsecond modulators for succeeding I=1,Q=−1's in the information signalare randomly selected among I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1)(−1,−1), (−1,−1) (−1,1), and the modulating signals applied to the firstand second modulators for succeeding I=1,Q=1's in the information signalare randomly selected among I,Qs of (1,1) (1,1), (−1, 1) (1,1), (−1,1)(−1,1), (1,−1) (1,−1).
 24. A method of modulating a carrier with aninformation signal according to claim 13, wherein the plurality ofserially coupled modulators comprises of first and second modulatorsthat perform quadrature phase shift keying, the modulating signalsapplied to the first and second modulators for succeeding I=−1,Q=−1's inthe information signal are periodically changed among I,Qs of (1,1)(−1,−1), (−1,−1) (1,1), (1,−1) (−1,1), (−1,−1), (1,1), the modulatingsignals applied to the first and second modulators for succeedingI=−1,Q=1's in the information signal are periodically changed among I,Qsof (−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1), (1,−1) (−1,−1), themodulating signals applied to the first and second modulators forsucceeding I=1,Q=−1's in the information signal are periodically changedamong I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1, −1)(−1,1), and the modulating signals applied to the first and secondmodulators for succeeding I=1,Q=1's in the information signal areperiodically changed among I,Qs of (1,1) (1,1), (−1, 1) (1,1), (−1,1)(−1,1), (1,−1) (1,−1).
 25. An encoder for an information signalmodulator having a plurality of serially coupled carrier suppressionmodulators each including a carrier input, a modulated carrier output,and a modulating signal input, a carrier being applied to the carrierinput of a first modulator and the modulated carrier output of eachmodulator being coupled to the carrier input of a succeeding modulator,the encoder comprising: a signal former responsive to the informationsignal for forming a plurality of modulating signals; and a plurality ofcouplers each for coupling at least one modulating signal to themodulating signal input of each of the serially coupled modulators,wherein a product of the modulating signals concurrently applied to theserially coupled modulators forms the information signal and the last ofthe serially coupled modulators produces a carrier suppressedinformation signal modulated output.
 26. An encoder for a suppressedcarrier modulator according to claim 25, wherein the plurality ofserially coupled modulators includes first and second modulators thatperform binary phase shift keying, the modulating signals applied to thefirst and second modulators (Q1, Q2) for succeeding “one” symbols in theinformation signal alternate between (1,−1) and (−1,1) and themodulating signals applied to the first and second modulators forsucceeding “zero” symbols in the information signal alternate between(−1,−1) and (1,1).
 27. An encoder for a suppressed carrier modulatoraccording to claim 25, wherein the plurality of serially coupledmodulators includes first and second modulators that perform binaryphase shift keying, the modulating signals applied to the first andsecond modulators (Q1, Q2) for succeeding “one” symbols in theinformation signal randomly vary between (1,−1) and (−1,1) and themodulating signals applied to the first and second modulators forsucceeding “zero” symbols in the information signal randomly varybetween (−1,−1) and (1,1).
 28. An encoder for a suppressed carriermodulator according to claim 25, wherein the plurality of seriallycoupled modulators includes first and second modulators that performquadrature phase shift keying, the modulating signals applied to thefirst and second modulators for succeeding I=−1,Q=−1's in theinformation signal rotate among I,Qs of (1,1) (−1,−1), (−1,−1) (1,1),(1,−1) (−1,1), (−1,−1) (1,1 ), the modulating signals applied to thefirst and second modulators for succeeding I=−1,Q=−1's in theinformation signal rotate among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1),(1,1) (−1,1), (1,−1) (−1,−1), the modulating signals applied to thefirst and second modulators for succeeding I=1,Q=−1's in the informationsignal rotate among I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1),(−1,−1) (−1,1), and the modulating signals applied the first and secondmodulators for succeeding I=1,Q=1's in the information signal rotateamong I,Qs of (1,1) (1,1), (−1,1) (1,1), (−1,1 ) (−1,1), (1,−1) (1,−1).29. An encoder for a suppressed carrier modulator according to claim 25,wherein the plurality of serially coupled modulators includes first andsecond modulators that perform quadrature phase shift keying, themodulating signals applied to the first and second modulators forsucceeding I=−1,Q=−1's in the information signal are randomly selectedamong I,Qs of (1,1) (−1,−1), (−1,−1) (1,1), (1,−1) (−1,1), (−1, −1)(1,1), the modulating signals applied to the first and second modulatorsfor succeeding I=−1,Q=1's in the information signal are randomlyselected among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1),(1,−1) (−1,−1), the modulating signals applied to the first and secondmodulators for succeeding I=1,Q=−1's in the information signal arerandomly selected among I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1)(−1,−1), (−1,−1) (−1,1), and the modulating signals applied to the firstand second modulators for succeeding I=1,Q=1's in the information signalare randomly selected among I,Qs of (1,1) (1,1), (−1,1) (1,1), (−1,1)(−1,1), (1,−1) (1, −1).
 30. An encoder for a suppressed carriermodulator according to claim 25, wherein the plurality of seriallycoupled modulators includes first and second modulators that performquadrature phase shift keying, the modulating signals applied to thefirst and second modulators for succeeding I=−1,Q=−1's in theinformation signal are periodically changed among I,Qs of (1,1) (−1,−1),(−1,−1) (1,1), (1,−1) (−1,1), (−1,−1) (1,1), the modulating signalsapplied to the first and second modulators for succeeding I=−1,Q=1's inthe information signal are periodically changed among I,Qs of (−1,1)(1,1), (−1,−1) (1,−1), (1,1) (−1,1), (1,−1) (−1,−1), the modulatingsignals applied to the first and second modulators for succeedingI=1,Q=−1's in the information signal are periodically changed among I,Qsof (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1,−1) (−1,1), and themodulating signals applied to the first and second modulators forsucceeding I=1,Q=1's in the information signal are periodically changedamong I,Qs of (1,1) (1,1), (−1,1) (1,1), (−1,1) (−1,1), (1,−1) (1,−1).31. Apparatus for modulating a carrier with an information signal,comprising: a plurality of serially coupled means for modulating aninput signal with a modulating signal, each modulating means including acarrier input, a modulating signal input and a modulated carrier output,a carrier being coupled to the carrier input of a first of the seriallycoupled modulating means and the modulated carrier output of eachmodulating means being coupled to the carrier input of a succeedingmodulating means; means responsive to the information signal forgenerating modulating signals to be applied to modulating signal inputsof the plurality of modulating means, a product of the modulatingsignals forming the information signal, wherein the modulating signalsapplied to each modulating means of the serially coupled modulatingmeans modifies the modulated carrier output received at the carrierinput of the respective modulating means to produce a carrier suppressedinformation signal modulated output at the last of the serially coupledmodulating means.
 32. Apparatus for modulating a carrier according toclaim 31, wherein the modulating signals applied to one of the pluralityof serially coupled modulating means produce a modulation component inthe modulating means output of the one of the plurality of seriallycoupled modulating means that substantially removes a modulatingcomponent produced by a preceding modulating means of the plurality ofserially coupled modulating means and the modulating signals applied toany one of the plurality of serial coupled modulating means alsoincludes the information signal.
 33. Apparatus for modulating a carrieraccording to claim 32, wherein the plurality of serially coupledmodulating means includes first and second modulating means, themodulating signal applied to one of the first and second modulatingmeans includes a component that is a reciprocal of the modulating signalapplied to the other of the first and second modulating means. 34.Apparatus for modulating a carrier according to claim 32, wherein theinformation signal is an analog signal.
 35. Apparatus for modulating acarrier according to claim 32, wherein the information signal is a QAMsignal.
 36. Apparatus for modulating a carrier according to claim 32,wherein the modulating signal applied to the first modulating means is apseudo-random signal.
 37. Apparatus for modulating a carrier accordingto claim 32, wherein the modulating signal applied to the firstmodulating means is a periodically varying signal.
 38. Apparatus formodulating a carrier according to claim 31, wherein the plurality ofserially coupled modulating means includes first and second modulatingmeans that perform binary phase shift keying, the modulating signalsapplied to the first and second modulating means (Q1, Q2) for succeeding“one” symbols in the information signal alternate between (1,−1) and(−1,1) and the modulating signals applied to the first and secondmodulating means for succeeding “zero” symbols in the information signalalternate between (−1,−1) and (1,1).
 39. Apparatus for modulating acarrier according to claim 31, wherein the plurality of serially coupledmodulating means includes first and second modulating means that performbinary phase shift keying, the modulating signals applied to the firstand second modulating means (Q1, Q2) for succeeding “one” symbols in theinformation signal randomly vary between (1,−) and (−1,1) and themodulating signals applied to the first and second modulating means forsucceeding “zero” symbols in the information signal randomly varybetween (−1,−1) and (1,1).
 40. Apparatus for modulating a carrier waveaccording to claim 31, wherein the plurality of serially coupledmodulating means includes first and second modulating means that performquadrature phase shift keying, the modulating signals applied to thefirst and second modulating means for succeeding I=−1,Q=−1's in theinformation signal rotate among I,Qs of (1,1) (−1,−1), (−1,−1) (1,1),(1,−1) (−1,1), (−1,−1) (1,1), the modulating signals applied to thefirst and second modulating means for succeeding I=−1,Q=1's in theinformation signal rotate among I,Qs of (−1,1) (1,1), (−1,−1) (1,−1),(1,1) (−1,1), (1,−1) (−1,−1), the modulating signals applied to thefirst and second modulating means for succeeding I=1,Q=−1's in theinformation signal rotate among I,Qs of (1,1) (1,−1), (1,−1) (1,1),(−1,1) (−1,−1), (−1,−1) (−1,1), and the modulating signals applied thefirst and second modulating means for succeeding I=1,Q=1's in theinformation signal rotate among I,Qs of (1,1) (1,1), (−1,1) (1,1),(−1,1) (−1,1), (1,−1) (1,−1).
 41. Apparatus for modulating a carrierwave according to claim 31, wherein the plurality of serially coupledmodulating means includes first and second modulating means that performquadrature phase shift keying, the modulating signals applied to thefirst and second modulating means for succeeding I=−1,Q=−1's in theinformation signal are randomly selected among I,Qs of (1,1) (−1,−1),(−1,−1) (1,1), (1,−1) (−1,1), (−1,−1) (1,1), the modulating signalsapplied to the first and second modulating means for succeedingI=−1,Q=1's in the information signal are randomly selected among I,Qs of(−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1), (1,−1) (−1,−1), themodulating signals applied to the first and second modulating means forsucceeding I=1,Q=−1's in the information signal are randomly selectedamong I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1,−1)(−1,1), and the modulating signals applied to the first and secondmodulating means for succeeding I=1,Q=1's in the information signal arerandomly selected among I,Qs of (1,1) (1,1), (−1,1) (1,1), (−1,1)(−1,1), (1,−1) (1,−1).
 42. Apparatus for modulating a carrier waveaccording to claim 31, wherein the plurality of serially coupledmodulating means includes first and second modulators that performquadrature phase shift keying, the modulating signals applied to thefirst and second modulating means for succeeding I=−1,Q=−1's in theinformation signal are periodically changed among I,Qs of (1,1) (−1,−1),(−1,−1) (1,1), (1,−1) (−1,1), (−1,−1) (1,1), the modulating signalsapplied to the first and second modulating means for succeedingI=−1,Q=1's in the information signal are periodically changed among I,Qsof (−1,1) (1,1), (−1,−1) (1,−1), (1,1) (−1,1), (1,−1) (−1,−1), themodulating signals applied to the first and second modulating means forsucceeding I=1,Q=−1's in the information signal are periodically changedamong I,Qs of (1,1) (1,−1), (1,−1) (1,1), (−1,1) (−1,−1), (−1, −1)(−1,1), and the modulating signals applied to the first and secondmodulating means for succeeding I=1,Q=1's in the information signal areperiodically changed among I,Qs of (1,1) (1,1), (−1,1) (1,1), (−1,1)(−1,1), (1,−1) (1,−1).